rev.5.00, apr.29.2 003, page 1 of 10 HAF1004(l), HAF1004(s) silicon p channel mos fet series power switching rej03g0028-0500z (previous ade-208-629b (z)) rev.5.00 2003.04.29 description this fet has the over temperature shut-down capability sensing to the junction temperature. this fet has the built-in over temperature shut-down circuit in the ga te area. and this circuit operation to shut-down the gate voltage in case of high junction temperature like applying over power consumption, over current etc.. features ? logic level operation to (?4 to ?6 v gate drive) ? high endurance capability against to the shut-down circuit ? built-in the over temperature shut-down circuit ? latch type shut down operation (need 0 voltage recovery) outline 1 2 3 1 2 3 1. gate 2. drain (flange) 3. source dpak-2 dpak-s d s g gate resistor latch circuit gate shut- down circuit tempe- rature senching circuit
HAF1004(l), HAF1004(s) rev.5.00, apr.29.2 003, page 2 of 10 absolute maximum ratings (ta = 25c) item symbol ratings unit drain to source voltage v dss ?60 v gate to source voltage v gss ?16 v gate to source voltage v gss 2.5 v drain current i d ?5 a drain peak current i d (pulse) note1 ?10 a body-drain diode reverse drain current i dr ?5 a cannel dissipation pch note2 20 w cannel temperature tch 150 c storage temperature tstg ?55 to +150 c notes: 1. pw 0 s, duty cycle 1% 2. value at ta = 25c typical operation characteristics item symbol min typ max unit test conditions v ih ?3.5 ? ? v input voltage v il ? ? ?1.2 v i ih1 ? ? ?100 a vi = ?8 v, v ds = 0 i ih2 ? ? ?50 a vi = ?3.5 v, v ds = 0 input current (gate non shut down) i il ? ? ?1 a vi = ?1.2 v, v ds = 0 i ih(sd)1 ? ?0.8 ? ma vi = ?8 v, v ds = 0 input current (gate shut down) i ih(sd)2 ? ?0.35 ? ma vi = ?3.5 v, v ds = 0 shut down temperature tsd ? 175 ? c cannel temperature gate operation voltage vop ?3.5 ? ?12 v
HAF1004(l), HAF1004(s) rev.5.00, apr.29.2 003, page 3 of 10 electrical characteristics (ta = 25c) item symbol m in typ max unit test conditions drain current i d1 4??a v gs = ?3.5 v, v ds = ?2 v drain current i d2 ? ? ?10 ma v gs = ?1.2 v, v ds = ?2 v drain to source breakdown voltage v (br)dss ?60 ? ? v i d = ?10 ma, v gs =0 gate to source breakdown voltage v (br)gss ?16 ? ? v i g = ?800 a, v ds =0 gate to source breakdown voltage v (br)gss 2.5 ? ? v i g = 100 a, v ds =0 i gss1 ? ? ?100 a v gs = ?8 v, v ds =0 i gss2 ? ? ?50 a v gs = ?3.5 v, v ds =0 i gss3 ? ? ?1 a v gs = ?1.2 v, v ds =0 gate to source leak current i gss4 ? ? 100 a v gs = 2.4 v, v ds =0 i gs(op)1 ? ?0.8 ? ma v gs = ?8 v, v ds =0 input current (shut down) i gs(op)2 ? ?0.35 ? ma v gs = ?3.5 v, v ds =0 zero gate voltage drain current i dss ? ? ?10 a v ds = ?60 v, v gs = 0 gate to source cut off voltage v gs(off) ?1.1 ? ?2.25 v v ds = ?10 v, i d = ?1 ma forward transfer admittance |y fs |24?si d =?2.5 a, v ds =?10 v note3 static drain to source on state resistance r ds(on) ? 140 200 m ? i d = ?2.5 a, v gs = ?10 v note3 static drain to source on state resistance r ds(on) ? 200 340 m ? i d = ?2.5 a, v gs = ?4 v note3 output capacitance coss ? 326 D pf v ds = ?10 v, v gs =0, f = 1 mhz turn-on delay time t d(on) ?2 D s rise time t r ?7.6?s turn off delay time t d(off) ?3.2 D s fall time t f ?3.2?s v gs = ?5 v, i d = ?2.5 a, r l = 12 ? body-drain diode forward voltage v df ? ?0.9 ? v i f = ?5a, v gs = 0 body-drain diode reverse recovery time t rr ?77?ns i f = ?5 a, v gs = 0 dif/dt = 50 a/s t os1 ?8.4?msv gs = ?5 v, v dd = ?16 v over lord shut down operation time note4 t os2 ?2.4?msv gs = ?5 v, v dd = ?24 v notes: 3. pulse test 4. including the junction temperature rise of the lorded condition
HAF1004(l), HAF1004(s) rev.5.00, apr.29.2 003, page 4 of 10 main characteristics channel dissipation pch (w) case temperature tc ( c) power vs. temperature derating ?100 ?20 ?50 ?10 ?2 ?5 ?1 ?0.5 ?0.3 ?0.5 ?1 ?2 ?5 ?10 ?20 ?50 ?10 0 drain source voltage v ds (v) drain current i d (a) maximum safe operation area ?10 ?8 ?6 ?4 ?2 0 ?2 ?4 ?6 ?8 ?10 ?10 v v = ?3.5 v gs drain to source voltage v ds (v) typical output characteristics 0?1?2?3?4?5 25 c tc = 75 c tc = 75 c 25 c ?25 c ?25 c gate to source voltage v gs (v) drain current i d (a) drain current i d (a) typical transfer characteristics 100 s 1 ms pw = 10 m s dc operation (tc = 25 c) ta = 25 c operation in this area is limited by r ds(on) thermal shut down operation area ?5 ?4 ?3 ?2 ?1 ?8 v ?6 v ?4 v pulse test v = ?10 v ds pulse test 40 30 20 10 0 50 100 150 200
HAF1004(l), HAF1004(s) rev.5.00, apr.29.2 003, page 5 of 10 ?1.6 ?2.0 ?1.2 ?0.8 ?0.4 0 ?2 ?4 ?6 ?8 ?10 pulse test gate to source voltage v gs (v) drain to saturation voltage vs. gate to source voltage v ds(on) (v) drain to source saturation voltage ?0.1 ?0.2 ?0.5 ?1 ?2 ?5 ?10 1000 200 500 100 20 50 10 drain current i d (a) drain source on state resistance r ds(on) (m ? ) drain source on sate resistance r ds(on) (m ? ) static drain to source state resistance vs. drain current 500 400 300 200 100 ?25 0 25 50 75 100 125 0 pulse test case temperature tc ( c) drain to source on state resistance vs. temperature 10 2 1 5 drain current i d (a) forward transfer admittance vs. drain current forward transfer admittance |yfs| (s) ?2.5 a i = ?5 a d ?1 a v = ?10 v gs v = ?4 v gs ?1 a ?1 a i = ?5 a d ?2.5 a -2.5 a ?5 a ? 0.01 ? 0.1 ? 1 ? 10 0.5 0.2 0.1 0.01 0.02 0.05 tc = ?25 c 25 c 75 c ds v = ?10 v pulse test v = ?4 v gs ?10 v pulse test
HAF1004(l), HAF1004(s) rev.5.00, apr.29.2 003, page 6 of 10 reverse drain current i dr (a) reverse recovery time trr (ns) body to drain diode reverse recovery time drain current i d (a) switching time t ( s) switching characteristics ?5 ?4 ?3 ?2 ?1 0 ?0.4 ?0.8 ?1.2 ?1.6 ?2.0 gs v = 0 v -5 v -10 v source to drain voltage v sd (v) reverse drain current i dr (a) reverse drain current vs. source to drain voltage pulse test 10000 1000 100 0 ?10 ?20 ?30 ?40 ?60 ?50 capacitance c (pf) drain to source v ds (v) typical capacitance vs. drain to source voltage 500 ?0.1 ?0.2 ?0.5 ?1 ?2 ?5 ?10 200 100 1000 20 50 10 di / dt = 50 a / s v = 0, ta = 25 c gs 5 ?0.1 ?0.2 ?0.5 ?1 ?2 ?5 ?10 2 1 0.5 0.2 0.1 50 20 10 100 r t v gs = ? 10 v, v dd = ? 30 v pw = 300 s, duty < 1 % t f d(on) t d(off) t v = 0 f = 1 mhz gs coss
HAF1004(l), HAF1004(s) rev.5.00, apr.29.2 003, page 7 of 10 ?20 ?4 ?8 ?12 ?16 0 gate to source voltage v gs (v) gate to source voltage vs. shutdown time of load-short test 0.1 shutdown time of lord-short test pw (s) 200 180 160 140 120 0 gate to source voltage v gs (v) shutdown case temperature tc (?c) 100 ?2 ?4 ?6 ?8 ?10 i = ?0.5 a d shutdown case temperature vs. gate to source voltage 0.0001 0.001 0.01 ?24v v = ?16 v dd 3 1 0.3 0.1 0.03 0.01 10 m 100 m 1 m 10 m 100 m 1 10 dm p pw t d = pw t ch ? c(t) = s (t) ? ch ? c ch ? c = 6.25?c/w, tc = 25?c tc = 25?c d = 1 0.5 0.2 0.1 0.05 0.02 0.01 1shot pulse pulse width pw (s) normalized transient thermal impedance s (t) normalized transient thermal impedance vs. pulse width
HAF1004(l), HAF1004(s) rev.5.00, apr.29.2 003, page 8 of 10 package dimensions package code jedec jeita mass (reference value) dpak (l)-(2) ? ? 0.42 g 6.5 0.5 2.3 0.2 0.55 0.1 1.2 0.3 0.55 0.1 5.5 0.5 1.7 0.5 16.2 0.5 4.7 0.5 5.4 0.5 1.15 0.1 2.29 0.5 2.29 0.5 0.8 0.1 0.55 0.1 3.1 0.5 (0.7) as of january, 2003 unit: mm
HAF1004(l), HAF1004(s) rev.5.00, apr.29.2 003, page 9 of 10 package code jedec jeita mass (reference value) dpak (s) ? conforms 0.28 g as of january, 2003 unit: mm 6.5 0.5 5.4 0.5 2.3 0.2 0.55 0.1 0 ? 0.25 0.55 0.1 1.5 0.5 5.5 0.5 2.5 0.5 (1.2) 0.8 0.1 2.29 0.5 2.29 0.5 1.2 max (5.1) (5.1) 1.0 max. (0.1) (0.1)
HAF1004(l), HAF1004(s) rev.5.00, apr.29.2 003, page 10 of 10 keep safety first in your circuit designs! 1. renesas technology corporation puts the maximum effort into making semiconductor products better and more reliable, but ther e is always the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corporation p roduct best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas technology corporat ion or a third party. 2. renesas technology corporation assumes no responsibility for any damage, or infringement of any third-party's rights, origin ating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents i nformation on products at the time of publication of these materials, and are subject to change by renesas technology corporation without notice due to product improvements or other reas ons. it is therefore recommended that customers contact renesas technology corporation or an authorized renesas technology corporation product distributor for the latest produ ct information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. renesas technology corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracie s or errors. please also pay attention to information published by renesas technology corporation by various means, including the renesas te chnology corporation semiconductor home page (http://www.renesas.com). 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, a nd algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. renesas technology corp oration assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. renesas technology corporation semiconductors are not designed or manufactured for use in a device or system that is used un der circumstances in which human life is potentially at stake. please contact renesas technology corporation or an authorized renesas technology corporation product distributor wh en considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or u ndersea repeater use. 6. the prior written approval of renesas technology corporation is necessary to reprint or reproduce in whole or in part these materials. 7. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a lic ense from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is pro hibited. 8. please contact renesas technology corporation for further details on these materials or the products contained therein. sales strategic planning div. nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan http://www.renesas.com copyright ? 2003. renesas technology corporation, all rights reserved. printed in japan. colophon 0.0
|
